# Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. # SPDX-License-Identifier: BSD-3-Clause # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions are met: # 1. Redistributions of source code must retain the above copyright notice, this # list of conditions and the following disclaimer. # 2. Redistributions in binary form must reproduce the above copyright notice, # this list of conditions and the following disclaimer in the documentation # and/or other materials provided with the distribution. # 3. Neither the name of the copyright holder nor the names of its # contributors may be used to endorse or promote products derived from # this software without specific prior written permission. # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" # AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE # IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE # DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE # FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL # DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR # SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER # CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, # OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. from typing import Type, Tuple, Union, Optional import cuda.bindings.driver as cuda import cutlass import cutlass.cute as cute from cutlass.cute.nvgpu import cpasync, tcgen05 import cutlass.utils as utils import cutlass.pipeline as pipeline from cutlass.pipeline import pipeline_init_arrive, pipeline_init_wait import cutlass.utils.blackwell_helpers as sm100_utils import cutlass.utils.blockscaled_layout as blockscaled_utils from cutlass.cute.runtime import from_dlpack import cutlass.cute.math as math from cutlass.cute.typing import Float32 def sigmoid_f32(a: Union[float, Float32], fastmath: bool = False) -> Union[float, Float32]: """ Compute the sigmoid of the input tensor. """ return cute.arch.rcp_approx(1.0 + math.exp(-a, fastmath=fastmath)) def silu_f32(a: Union[float, Float32], fastmath: bool = False) -> Union[float, Float32]: """ Compute the silu of the input tensor. """ return a * sigmoid_f32(a, fastmath=fastmath) """ This example provides an experimental implementation of the SM100 batched dense blockscaled GEMM kernel, please note that the APIs and implementation details related to this kernel may change in future releases. A high-performance persistent batched dense blockscaled GEMM example for the NVIDIA Blackwell SM100 architecture using CUTE DSL. - Matrix A is MxKxL, L is batch dimension, A can be row-major("K") or column-major("M") for MXF8 input type and can only be row-major("K") for MXF4/NVF4 input type - Matrix B is NxKxL, L is batch dimension, B can be row-major("N") or column-major("K") for MXF8 input type and can only be row-major("K") for MXF4/NVF4 input type - Matrix AB12 is MxNxL, L is batch dimension, AB12 can be row-major("N") or column-major("M") - Matrix C is Mx(N/2)xL, L is batch dimension. Layout must match AB12. - Matrix SFA layout is filled internally according to A shape and BlockScaledBasicChunk, which has M×ceil_div(K, sf_vec_size)×L elements respectively - Matrix SFB layout is filled internally according to B shape and BlockScaledBasicChunk, which has N×ceil_div(K, sf_vec_size)×L elements respectively This GEMM kernel supports the following features: - Utilizes Tensor Memory Access (TMA) for efficient memory operations - Utilizes Blackwell's tcgen05.mma for matrix multiply-accumulate (MMA) operations (including 2cta mma instructions) - Implements TMA multicast with cluster to reduce L2 memory traffic - Support persistent tile scheduling to better overlap memory load/store with mma between tiles - Support warp specialization to avoid explicit pipelining between mainloop load and mma This GEMM works as follows: 1. DMA warp: Load A and B matrices from global memory (GMEM) to shared memory (SMEM) using TMA operations. 2. MMA warp: - Load scale factor A/B from shared memory (SMEM) to tensor memory (TMEM) using tcgen05.cp instruction. - Perform matrix multiply-accumulate (MMA) operations using tcgen05.mma instruction. 3. EPILOGUE warp: - Load completed accumulator from tensor memory (TMEM) to registers (RMEM) using tcgen05.ld. - Type convert C matrix to output type. - Optionally store C matrix from registers (RMEM) to shared memory (SMEM) to global memory (GMEM) with TMA operations, or directly store C matrix from registers (RMEM) to global memory (GMEM) without TMA operations. - Optionally accept an elementwise lambda function epilogue_op to apply to the output tensor: e.g., relu can set epilogue_op = lambda x: cute.where(x > 0, x, cute.full_like(x, 0)) SM100 tcgen05.mma.kind.block_scale instructions operate as follows: - Read matrix A from SMEM - Read matrix B from SMEM - Read scalefactor A from TMEM - Read scalefactor B from TMEM - Write accumulator to TMEM The accumulator in TMEM must then be loaded to registers before writing back to GMEM. Constraints: * Supported input data types: mxf8, mxf4, nvf4 see detailed valid dtype combinations in below Sm100BlockScaledPersistentDenseGemmKernel class documentation * A/B tensor must have the same data type, mixed data type is not supported (e.g., mxf8 x mxf4) * Mma tiler M must be 128 or 256(use_2cta_instrs) * Mma tiler N must be 64/128/192/256 * Cluster shape M/N must be positive and power of 2, total cluster size <= 16 * Cluster shape M must be multiple of 2 if Mma tiler M is 256(use_2cta_instrs) * The contiguous dimension of A/B/C tensors must be at least 16 bytes aligned, i.e, number of elements is a multiple of 16 and 32 for Float8 and Float4, respectively. """ class Sm100BlockScaledPersistentDenseGemmKernel: """This class implements batched matrix multiplication (C = A x SFA x B x SFB) with support for various data types and architectural features specific to Blackwell GPUs with persistent tile scheduling and warp specialization. :param sf_vec_size: Scalefactor vector size. :type sf_vec_size: int :param mma_tiler_mn: Shape of the Matrix Multiply-Accumulate (MMA) tile (M,N) :type mma_tiler_mn: Tuple[int, int] :param cluster_shape_mn: Cluster dimensions (M,N) for parallel processing :type cluster_shape_mn: Tuple[int, int] :note: In current version, A and B tensor must have the same data type - i.e., Float8E4M3FN for A and Float8E5M2 for B is not supported :note: Supported combinations of A/B data types, SF data typs and SF vector size: - MXF8: A/B: Float8E5M2/Float8E4M3FN + SF: Float8E8M0FNU + sf_vec_size: 32 - MXF4: A/B: Float4E2M1FN + SF: Float8E8M0FNU + sf_vec_size: 32 - NVF4: A/B: Float4E2M1FN + SF: Float8E8M0FNU/Float8E4M3FN + sf_vec_size: 16 :note: Supported accumulator data types: - Float32 :note: Supported C data types: - Float32 - Float16/BFloat16 - Float8E4M3FN/Float8E5M2 :note: Constraints: - MMA tiler M must be 128 or 256 (use_2cta_instrs) - MMA tiler N must be 64/128/192/256 - Cluster shape M must be multiple of 2 if Mma tiler M is 256 - Cluster shape M/N must be positive and power of 2, total cluster size <= 16 - Also, Cluster shape M/N must be <= 4 for scale factor multicasts due to limited size of scale factors Example: >>> gemm = Sm100BlockScaledPersistentDenseGemmKernel( ... sf_vec_size=16, ... mma_tiler_mn=(256, 128), ... cluster_shape_mn=(2, 1) ... ) >>> gemm(a_tensor, b_tensor, sfa_tensor, sfb_tensor, c_tensor, max_active_clusters, stream) """ def __init__( self, sf_vec_size: int, mma_tiler_mn: Tuple[int, int], cluster_shape_mn: Tuple[int, int], vector_f32: bool, ab12_stages: int, ): """Initializes the configuration for a Blackwell dense GEMM kernel. This configuration includes several key aspects: 1. MMA Instruction Settings (tcgen05): - acc_dtype: Data types for MMA accumulator, always set to Float32 - sf_vec_size: Scalefactor A/B vector size. - mma_tiler_mn: The (M, N) shape of the MMA instruction tiler. 2. Cluster Shape: - cluster_shape_mn: The (ClusterM, ClusterN) shape of the CTA cluster. :param sf_vec_size: Scalefactor vector size. :type sf_vec_size: int :param mma_tiler_mn: Tuple (M, N) shape of the MMA instruction. :type mma_tiler_mn: Tuple[int, int] :param cluster_shape_mn: Tuple (ClusterM, ClusterN) shape of the cluster. :type cluster_shape_mn: Tuple[int, int] :param ab12_stages: Number of AB12 stages. If None, will be computed automatically. :type ab12_stages: Optional[int] """ self.acc_dtype = cutlass.Float32 self.sf_vec_size = sf_vec_size self.use_2cta_instrs = mma_tiler_mn[0] == 256 self.cluster_shape_mn = cluster_shape_mn self.ab12_stages = ab12_stages # K dimension is deferred in _setup_attributes self.mma_tiler = (*mma_tiler_mn, 1) self.cta_group = tcgen05.CtaGroup.TWO if self.use_2cta_instrs else tcgen05.CtaGroup.ONE self.occupancy = 1 # Set specialized warp ids self.epilog_warp_id = ( 0, 1, 2, 3, ) self.mma_warp_id = 4 self.tma_warp_id = 5 self.threads_per_cta = 32 * len((self.mma_warp_id, self.tma_warp_id, *self.epilog_warp_id)) # Set barrier id for epilogue sync and tmem ptr sync self.epilog_sync_barrier = pipeline.NamedBarrier( barrier_id=1, num_threads=32 * len(self.epilog_warp_id), ) self.tmem_alloc_barrier = pipeline.NamedBarrier( barrier_id=2, num_threads=32 * len((self.mma_warp_id, *self.epilog_warp_id)), ) self.smem_capacity = utils.get_smem_capacity_in_bytes("sm_100") SM100_TMEM_CAPACITY_COLUMNS = 512 self.num_tmem_alloc_cols = SM100_TMEM_CAPACITY_COLUMNS # Use vector f32 instructions for epilogue self.vector_f32 = vector_f32 # Amax reduction configuration self.num_epilog_warps = len(self.epilog_warp_id) def _setup_attributes(self): """Set up configurations that are dependent on GEMM inputs This method configures various attributes based on the input tensor properties (data types, leading dimensions) and kernel settings: - Configuring tiled MMA - Computing MMA/cluster/tile shapes - Computing cluster layout - Computing multicast CTAs for A/B/SFA/SFB - Computing epilogue subtile - Setting up A/B/SFA/SFB/C stage counts in shared memory - Computing A/B/SFA/SFB/C shared memory layout """ # Compute mma instruction shapes # (MMA_Tile_Shape_M, MMA_Tile_Shape_N, MMA_Inst_Shape_K) self.mma_inst_shape_mn = ( self.mma_tiler[0], self.mma_tiler[1], ) # (CTA_Tile_Shape_M, Round_Up(MMA_Tile_Shape_N, 128), MMA_Inst_Shape_K) self.mma_inst_shape_mn_sfb = ( self.mma_inst_shape_mn[0] // (2 if self.use_2cta_instrs else 1), cute.round_up(self.mma_inst_shape_mn[1], 128), ) tiled_mma = sm100_utils.make_blockscaled_trivial_tiled_mma( self.a_dtype, self.a_major_mode, self.b_major_mode, self.sf_dtype, self.sf_vec_size, self.cta_group, self.mma_inst_shape_mn, ) tiled_mma_sfb = sm100_utils.make_blockscaled_trivial_tiled_mma( self.a_dtype, self.a_major_mode, self.b_major_mode, self.sf_dtype, self.sf_vec_size, cute.nvgpu.tcgen05.CtaGroup.ONE, self.mma_inst_shape_mn_sfb, ) # Compute mma/cluster/tile shapes mma_inst_shape_k = cute.size(tiled_mma.shape_mnk, mode=[2]) mma_inst_tile_k = 4 self.mma_tiler = ( self.mma_inst_shape_mn[0], self.mma_inst_shape_mn[1], mma_inst_shape_k * mma_inst_tile_k, ) self.mma_tiler_sfb = ( self.mma_inst_shape_mn_sfb[0], self.mma_inst_shape_mn_sfb[1], mma_inst_shape_k * mma_inst_tile_k, ) self.cta_tile_shape_mnk = ( self.mma_tiler[0] // cute.size(tiled_mma.thr_id.shape), self.mma_tiler[1], self.mma_tiler[2], ) self.mma_tiler_c = ( self.mma_inst_shape_mn[0], self.mma_inst_shape_mn[1] // 2, mma_inst_shape_k * mma_inst_tile_k, ) self.cta_tile_shape_mnk_c = ( self.mma_tiler_c[0] // cute.size(tiled_mma.thr_id.shape), self.mma_tiler_c[1], self.mma_tiler_c[2], ) # Compute cluster layout self.cluster_layout_vmnk = cute.tiled_divide( cute.make_layout((*self.cluster_shape_mn, 1)), (tiled_mma.thr_id.shape,), ) self.cluster_layout_sfb_vmnk = cute.tiled_divide( cute.make_layout((*self.cluster_shape_mn, 1)), (tiled_mma_sfb.thr_id.shape,), ) # Compute number of multicast CTAs for A/B self.num_mcast_ctas_a = cute.size(self.cluster_layout_vmnk.shape[2]) self.num_mcast_ctas_b = cute.size(self.cluster_layout_vmnk.shape[1]) self.num_mcast_ctas_sfb = cute.size(self.cluster_layout_sfb_vmnk.shape[1]) self.is_a_mcast = self.num_mcast_ctas_a > 1 self.is_b_mcast = self.num_mcast_ctas_b > 1 self.is_sfb_mcast = self.num_mcast_ctas_sfb > 1 # Always use subtile (128,32) self.epi_tile = (cute.make_layout(128), cute.make_layout(32)) self.epi_tile_cnt = ( self.cta_tile_shape_mnk[0] // cute.size(self.epi_tile[0]), self.cta_tile_shape_mnk[1] // cute.size(self.epi_tile[1]), ) # Always use subtile (128,64) for AB12 self.epi_tile_ab12 = (cute.make_layout(128), cute.make_layout(64)) # Setup A/B/C stage count in shared memory and ACC stage count in tensor memory self.num_acc_stage, self.num_ab_stage, self.num_c_stage, self.num_ab12_stage = self._compute_stages( tiled_mma, self.mma_tiler, self.a_dtype, self.b_dtype, self.epi_tile, self.c_dtype, self.c_layout, self.sf_dtype, self.sf_vec_size, self.ab12_dtype, self.ab12_layout, self.epi_tile_ab12, self.smem_capacity, self.occupancy, self.ab12_stages, ) # Compute A/B/SFA/SFB/C shared memory layout self.a_smem_layout_staged = sm100_utils.make_smem_layout_a( tiled_mma, self.mma_tiler, self.a_dtype, self.num_ab_stage, ) self.b_smem_layout_staged = sm100_utils.make_smem_layout_b( tiled_mma, self.mma_tiler, self.b_dtype, self.num_ab_stage, ) self.sfa_smem_layout_staged = blockscaled_utils.make_smem_layout_sfa( tiled_mma, self.mma_tiler, self.sf_vec_size, self.num_ab_stage, ) self.sfb_smem_layout_staged = blockscaled_utils.make_smem_layout_sfb( tiled_mma, self.mma_tiler, self.sf_vec_size, self.num_ab_stage, ) self.c_smem_layout_staged = sm100_utils.make_smem_layout_epi( self.c_dtype, self.c_layout, self.epi_tile, self.num_c_stage, ) self.ab12_smem_layout_staged = sm100_utils.make_smem_layout_epi( self.ab12_dtype, self.ab12_layout, self.epi_tile_ab12, self.num_ab12_stage, ) @cute.jit def __call__( self, a_tensor: cute.Tensor, b_tensor: cute.Tensor, sfa_tensor: cute.Tensor, sfb_tensor: cute.Tensor, c_tensor: cute.Tensor, ab12_tensor: cute.Tensor, amax_tensor: Optional[cute.Tensor], sfc_tensor: Optional[cute.Tensor], norm_const_tensor: Optional[cute.Tensor], alpha: cutlass.Float32, max_active_clusters: cutlass.Constexpr, stream: cuda.CUstream, epilogue_op: cutlass.Constexpr = lambda x: x, ): """Execute the GEMM operation in steps: - Setup static attributes before smem/grid/tma computation - Setup TMA load/store atoms and tensors - Compute grid size with regard to hardware constraints - Define shared storage for kernel - Launch the kernel synchronously :param a_tensor: Input tensor A :type a_tensor: cute.Tensor :param b_tensor: Input tensor B :type b_tensor: cute.Tensor :param sfa_tensor: Scale factor tensor A :type sfa_tensor: cute.Tensor :param sfb_tensor: Scale factor tensor B :type sfb_tensor: cute.Tensor :param c_tensor: Output tensor C :type c_tensor: cute.Tensor :param ab12_tensor: Input tensor AB12 :type ab12_tensor: cute.Tensor :param sfc_tensor: Scale factor tensor C :type sfc_tensor: cute.Tensor :param norm_const_tensor: Normalization constant tensor for quantization :type norm_const_tensor: cute.Tensor :param amax_tensor: Output tensor for absolute maximum value :type amax_tensor: cute.Tensor :param max_active_clusters: Maximum number of active clusters :type max_active_clusters: cutlass.Constexpr :param stream: CUDA stream for asynchronous execution :type stream: cuda.CUstream :param epilogue_op: Optional elementwise lambda function to apply to the output tensor :type epilogue_op: cutlass.Constexpr :raises TypeError: If input data types are incompatible with the MMA instruction. """ # Setup static attributes before smem/grid/tma computation self.a_dtype: Type[cutlass.Numeric] = a_tensor.element_type self.b_dtype: Type[cutlass.Numeric] = b_tensor.element_type self.sf_dtype: Type[cutlass.Numeric] = sfa_tensor.element_type self.c_dtype: Type[cutlass.Numeric] = c_tensor.element_type self.ab12_dtype: Type[cutlass.Numeric] = ab12_tensor.element_type self.a_major_mode = utils.LayoutEnum.from_tensor(a_tensor).mma_major_mode() self.b_major_mode = utils.LayoutEnum.from_tensor(b_tensor).mma_major_mode() self.c_layout = utils.LayoutEnum.from_tensor(c_tensor) self.ab12_layout = utils.LayoutEnum.from_tensor(ab12_tensor) # Check if input data types are compatible with MMA instruction if cutlass.const_expr(self.a_dtype != self.b_dtype): raise TypeError(f"Type must match: {self.a_dtype} != {self.b_dtype}") # Setup attributes that dependent on gemm inputs self._setup_attributes() # Setup sfa/sfb tensor by filling A/B tensor to scale factor atom layout # ((Atom_M, Rest_M),(Atom_K, Rest_K),RestL) sfa_layout = blockscaled_utils.tile_atom_to_shape_SF(a_tensor.shape, self.sf_vec_size) sfa_tensor = cute.make_tensor(sfa_tensor.iterator, sfa_layout) # ((Atom_N, Rest_N),(Atom_K, Rest_K),RestL) sfb_layout = blockscaled_utils.tile_atom_to_shape_SF(b_tensor.shape, self.sf_vec_size) sfb_tensor = cute.make_tensor(sfb_tensor.iterator, sfb_layout) tiled_mma = sm100_utils.make_blockscaled_trivial_tiled_mma( self.a_dtype, self.a_major_mode, self.b_major_mode, self.sf_dtype, self.sf_vec_size, self.cta_group, self.mma_inst_shape_mn, ) # For 2CTA blockscaled kernels, SFB needs to be replicated across peer CTAs. # {$nv-internal-release} tiled_mma_sfb = sm100_utils.make_blockscaled_trivial_tiled_mma( self.a_dtype, self.a_major_mode, self.b_major_mode, self.sf_dtype, self.sf_vec_size, cute.nvgpu.tcgen05.CtaGroup.ONE, self.mma_inst_shape_mn_sfb, ) atom_thr_size = cute.size(tiled_mma.thr_id.shape) # Setup TMA load for A a_op = sm100_utils.cluster_shape_to_tma_atom_A(self.cluster_shape_mn, tiled_mma.thr_id) a_smem_layout = cute.slice_(self.a_smem_layout_staged, (None, None, None, 0)) tma_atom_a, tma_tensor_a = cute.nvgpu.make_tiled_tma_atom_A( a_op, a_tensor, a_smem_layout, self.mma_tiler, tiled_mma, self.cluster_layout_vmnk.shape, ) # Setup TMA load for B b_op = sm100_utils.cluster_shape_to_tma_atom_B(self.cluster_shape_mn, tiled_mma.thr_id) b_smem_layout = cute.slice_(self.b_smem_layout_staged, (None, None, None, 0)) tma_atom_b, tma_tensor_b = cute.nvgpu.make_tiled_tma_atom_B( b_op, b_tensor, b_smem_layout, self.mma_tiler, tiled_mma, self.cluster_layout_vmnk.shape, ) # Setup TMA load for SFA sfa_op = sm100_utils.cluster_shape_to_tma_atom_A(self.cluster_shape_mn, tiled_mma.thr_id) sfa_smem_layout = cute.slice_(self.sfa_smem_layout_staged, (None, None, None, 0)) tma_atom_sfa, tma_tensor_sfa = cute.nvgpu.make_tiled_tma_atom_A( sfa_op, sfa_tensor, sfa_smem_layout, self.mma_tiler, tiled_mma, self.cluster_layout_vmnk.shape, internal_type=cutlass.Int16, ) # Setup TMA load for SFB sfb_op = sm100_utils.cluster_shape_to_tma_atom_SFB(self.cluster_shape_mn, tiled_mma.thr_id) sfb_smem_layout = cute.slice_(self.sfb_smem_layout_staged, (None, None, None, 0)) tma_atom_sfb, tma_tensor_sfb = cute.nvgpu.make_tiled_tma_atom_B( sfb_op, sfb_tensor, sfb_smem_layout, self.mma_tiler_sfb, tiled_mma_sfb, self.cluster_layout_sfb_vmnk.shape, internal_type=cutlass.Int16, ) if cutlass.const_expr(self.cta_tile_shape_mnk_c[1] == 192): x = tma_tensor_sfb.stride[0][1] y = cute.ceil_div(tma_tensor_sfb.shape[0][1], 4) new_shape = ( (tma_tensor_sfb.shape[0][0], ((2, 2), y)), tma_tensor_sfb.shape[1], tma_tensor_sfb.shape[2], ) # Use right multiplication for ScaledBasis (3 * x instead of x * 3) x_times_3 = 3 * x new_stride = ( (tma_tensor_sfb.stride[0][0], ((x, x), x_times_3)), tma_tensor_sfb.stride[1], tma_tensor_sfb.stride[2], ) tma_tensor_sfb_new_layout = cute.make_layout(new_shape, stride=new_stride) tma_tensor_sfb = cute.make_tensor(tma_tensor_sfb.iterator, tma_tensor_sfb_new_layout) a_copy_size = cute.size_in_bytes(self.a_dtype, a_smem_layout) b_copy_size = cute.size_in_bytes(self.b_dtype, b_smem_layout) sfa_copy_size = cute.size_in_bytes(self.sf_dtype, sfa_smem_layout) sfb_copy_size = cute.size_in_bytes(self.sf_dtype, sfb_smem_layout) self.num_tma_load_bytes = (a_copy_size + b_copy_size + sfa_copy_size + sfb_copy_size) * atom_thr_size # Setup TMA store for C epi_smem_layout = cute.slice_(self.c_smem_layout_staged, (None, None, 0)) tma_atom_c, tma_tensor_c = cpasync.make_tiled_tma_atom( cpasync.CopyBulkTensorTileS2GOp(), c_tensor, epi_smem_layout, self.epi_tile, ) epi_ab12_smem_layout = cute.slice_(self.ab12_smem_layout_staged, (None, None, 0)) tma_atom_ab12, tma_tensor_ab12 = cpasync.make_tiled_tma_atom( cpasync.CopyBulkTensorTileS2GOp(), ab12_tensor, epi_ab12_smem_layout, self.epi_tile_ab12, ) # Compute grid size self.tile_sched_params, grid = self._compute_grid( c_tensor, self.cta_tile_shape_mnk_c, self.cluster_shape_mn, max_active_clusters, ) self.buffer_align_bytes = 1024 self.generate_sfc = sfc_tensor is not None and norm_const_tensor is not None if cutlass.const_expr(self.generate_sfc): sfc_layout = blockscaled_utils.tile_atom_to_shape_SF(c_tensor.shape, self.sf_vec_size) sfc_tensor = cute.make_tensor(sfc_tensor.iterator, sfc_layout) self.generate_amax = amax_tensor is not None # Define shared storage for kernel @cute.struct class SharedStorage: ab_full_mbar_ptr: cute.struct.MemRange[cutlass.Int64, self.num_ab_stage] ab_empty_mbar_ptr: cute.struct.MemRange[cutlass.Int64, self.num_ab_stage] acc_full_mbar_ptr: cute.struct.MemRange[cutlass.Int64, self.num_acc_stage] acc_empty_mbar_ptr: cute.struct.MemRange[cutlass.Int64, self.num_acc_stage] tmem_dealloc_mbar_ptr: cutlass.Int64 tmem_holding_buf: cutlass.Int32 # (EPI_TILE_M, EPI_TILE_N, STAGE) sC: cute.struct.Align[ cute.struct.MemRange[ self.c_dtype, cute.cosize(self.c_smem_layout_staged.outer), ], self.buffer_align_bytes, ] sAB12: cute.struct.Align[ cute.struct.MemRange[ self.ab12_dtype, cute.cosize(self.ab12_smem_layout_staged.outer), ], self.buffer_align_bytes, ] # (MMA, MMA_M, MMA_K, STAGE) sA: cute.struct.Align[ cute.struct.MemRange[self.a_dtype, cute.cosize(self.a_smem_layout_staged.outer)], self.buffer_align_bytes, ] # (MMA, MMA_N, MMA_K, STAGE) sB: cute.struct.Align[ cute.struct.MemRange[self.b_dtype, cute.cosize(self.b_smem_layout_staged.outer)], self.buffer_align_bytes, ] # (MMA, MMA_M, MMA_K, STAGE) sSFA: cute.struct.Align[ cute.struct.MemRange[self.sf_dtype, cute.cosize(self.sfa_smem_layout_staged)], self.buffer_align_bytes, ] # (MMA, MMA_N, MMA_K, STAGE) sSFB: cute.struct.Align[ cute.struct.MemRange[self.sf_dtype, cute.cosize(self.sfb_smem_layout_staged)], self.buffer_align_bytes, ] # Amax reduction shared memory (one FP32 per epilogue warp) # Use smaller alignment for amax since it's only 16 bytes sAmax: cute.struct.Align[ cute.struct.MemRange[cutlass.Float32, self.num_epilog_warps], self.buffer_align_bytes, ] self.shared_storage = SharedStorage # Launch the kernel synchronously self.kernel( tiled_mma, tiled_mma_sfb, tma_atom_a, tma_tensor_a, tma_atom_b, tma_tensor_b, tma_atom_sfa, tma_tensor_sfa, tma_atom_sfb, tma_tensor_sfb, tma_atom_c, tma_tensor_c, tma_atom_ab12, tma_tensor_ab12, amax_tensor, sfc_tensor, norm_const_tensor, self.cluster_layout_vmnk, self.cluster_layout_sfb_vmnk, self.a_smem_layout_staged, self.b_smem_layout_staged, self.sfa_smem_layout_staged, self.sfb_smem_layout_staged, self.c_smem_layout_staged, self.ab12_smem_layout_staged, self.epi_tile, self.epi_tile_ab12, self.tile_sched_params, epilogue_op, alpha, ).launch( grid=grid, block=[self.threads_per_cta, 1, 1], cluster=(*self.cluster_shape_mn, 1), stream=stream, ) return # GPU device kernel @cute.kernel def kernel( self, tiled_mma: cute.TiledMma, tiled_mma_sfb: cute.TiledMma, tma_atom_a: cute.CopyAtom, mA_mkl: cute.Tensor, tma_atom_b: cute.CopyAtom, mB_nkl: cute.Tensor, tma_atom_sfa: cute.CopyAtom, mSFA_mkl: cute.Tensor, tma_atom_sfb: cute.CopyAtom, mSFB_nkl: cute.Tensor, tma_atom_c: cute.CopyAtom, mC_mnl: cute.Tensor, tma_atom_ab12: cute.CopyAtom, mAB12_mnl: cute.Tensor, mAmax_tensor: Optional[cute.Tensor], mSFC_mnl: Optional[cute.Tensor], norm_const_tensor: Optional[cute.Tensor], cluster_layout_vmnk: cute.Layout, cluster_layout_sfb_vmnk: cute.Layout, a_smem_layout_staged: cute.ComposedLayout, b_smem_layout_staged: cute.ComposedLayout, sfa_smem_layout_staged: cute.Layout, sfb_smem_layout_staged: cute.Layout, c_smem_layout_staged: Union[cute.Layout, cute.ComposedLayout], ab12_smem_layout_staged: Union[cute.Layout, cute.ComposedLayout], epi_tile: cute.Tile, epi_tile_ab12: cute.Tile, tile_sched_params: utils.PersistentTileSchedulerParams, epilogue_op: cutlass.Constexpr, alpha: cutlass.Float32, ): """ GPU device kernel performing the Persistent batched GEMM computation. """ warp_idx = cute.arch.warp_idx() warp_idx = cute.arch.make_warp_uniform(warp_idx) # # Prefetch tma desc # if warp_idx == self.tma_warp_id: cpasync.prefetch_descriptor(tma_atom_a) cpasync.prefetch_descriptor(tma_atom_b) cpasync.prefetch_descriptor(tma_atom_sfa) cpasync.prefetch_descriptor(tma_atom_sfb) cpasync.prefetch_descriptor(tma_atom_c) cpasync.prefetch_descriptor(tma_atom_ab12) use_2cta_instrs = cute.size(tiled_mma.thr_id.shape) == 2 # # Setup cta/thread coordinates # # Coords inside cluster bidx, bidy, bidz = cute.arch.block_idx() mma_tile_coord_v = bidx % cute.size(tiled_mma.thr_id.shape) is_leader_cta = mma_tile_coord_v == 0 cta_rank_in_cluster = cute.arch.make_warp_uniform(cute.arch.block_idx_in_cluster()) block_in_cluster_coord_vmnk = cluster_layout_vmnk.get_flat_coord(cta_rank_in_cluster) block_in_cluster_coord_sfb_vmnk = cluster_layout_sfb_vmnk.get_flat_coord(cta_rank_in_cluster) # Coord inside cta tidx, _, _ = cute.arch.thread_idx() # # Alloc and init: a+b full/empty, accumulator full/empty, tensor memory dealloc barrier # smem = utils.SmemAllocator() storage = smem.allocate(self.shared_storage) # Initialize mainloop ab_pipeline (barrier) and states ab_pipeline_producer_group = pipeline.CooperativeGroup(pipeline.Agent.Thread) num_tma_producer = self.num_mcast_ctas_a + self.num_mcast_ctas_b - 1 ab_pipeline_consumer_group = pipeline.CooperativeGroup(pipeline.Agent.Thread, num_tma_producer) ab_pipeline = pipeline.PipelineTmaUmma.create( barrier_storage=storage.ab_full_mbar_ptr.data_ptr(), num_stages=self.num_ab_stage, producer_group=ab_pipeline_producer_group, consumer_group=ab_pipeline_consumer_group, tx_count=self.num_tma_load_bytes, cta_layout_vmnk=cluster_layout_vmnk, defer_sync=True, ) # Initialize acc_pipeline (barrier) and states acc_pipeline_producer_group = pipeline.CooperativeGroup(pipeline.Agent.Thread) num_acc_consumer_threads = len(self.epilog_warp_id) * (2 if use_2cta_instrs else 1) acc_pipeline_consumer_group = pipeline.CooperativeGroup(pipeline.Agent.Thread, num_acc_consumer_threads) acc_pipeline = pipeline.PipelineUmmaAsync.create( barrier_storage=storage.acc_full_mbar_ptr.data_ptr(), num_stages=self.num_acc_stage, producer_group=acc_pipeline_producer_group, consumer_group=acc_pipeline_consumer_group, cta_layout_vmnk=cluster_layout_vmnk, defer_sync=True, ) # Tensor memory dealloc barrier init tmem = utils.TmemAllocator( storage.tmem_holding_buf, barrier_for_retrieve=self.tmem_alloc_barrier, allocator_warp_id=self.epilog_warp_id[0], is_two_cta=use_2cta_instrs, two_cta_tmem_dealloc_mbar_ptr=storage.tmem_dealloc_mbar_ptr, ) # Cluster arrive after barrier init pipeline_init_arrive(cluster_shape_mn=self.cluster_shape_mn, is_relaxed=True) # # Setup smem tensor A/B/SFA/SFB/C # # (MMA, MMA_M, MMA_K, STAGE) sA = storage.sA.get_tensor(a_smem_layout_staged.outer, swizzle=a_smem_layout_staged.inner) # (MMA, MMA_N, MMA_K, STAGE) sB = storage.sB.get_tensor(b_smem_layout_staged.outer, swizzle=b_smem_layout_staged.inner) # (MMA, MMA_M, MMA_K, STAGE) sSFA = storage.sSFA.get_tensor(sfa_smem_layout_staged) # (MMA, MMA_N, MMA_K, STAGE) sSFB = storage.sSFB.get_tensor(sfb_smem_layout_staged) # (EPI_TILE_M, EPI_TILE_N, STAGE) sC = storage.sC.get_tensor( c_smem_layout_staged.outer, swizzle=c_smem_layout_staged.inner, dtype=self.c_dtype, ) # (EPI_TILE_M, EPI_TILE_N, STAGE) sAB12 = storage.sAB12.get_tensor( ab12_smem_layout_staged.outer, swizzle=ab12_smem_layout_staged.inner, dtype=self.ab12_dtype, ) # Shared memory for amax reduction (one FP32 per epilogue warp) # Simple 1D layout. The allocation always here if no amax is generated, # as the overhead is minimal and we want to keep the code simple. amax_layout = cute.make_layout((self.num_epilog_warps,)) sAmax = storage.sAmax.get_tensor(amax_layout) # # Compute multicast mask for A/B/SFA/SFB buffer full # a_full_mcast_mask = None b_full_mcast_mask = None sfa_full_mcast_mask = None sfb_full_mcast_mask = None if cutlass.const_expr(self.is_a_mcast or self.is_b_mcast or use_2cta_instrs): a_full_mcast_mask = cpasync.create_tma_multicast_mask(cluster_layout_vmnk, block_in_cluster_coord_vmnk, mcast_mode=2) b_full_mcast_mask = cpasync.create_tma_multicast_mask(cluster_layout_vmnk, block_in_cluster_coord_vmnk, mcast_mode=1) sfa_full_mcast_mask = cpasync.create_tma_multicast_mask(cluster_layout_vmnk, block_in_cluster_coord_vmnk, mcast_mode=2) sfb_full_mcast_mask = cpasync.create_tma_multicast_mask(cluster_layout_sfb_vmnk, block_in_cluster_coord_sfb_vmnk, mcast_mode=1) # # Local_tile partition global tensors # # (bM, bK, RestM, RestK, RestL) gA_mkl = cute.local_tile(mA_mkl, cute.slice_(self.mma_tiler, (None, 0, None)), (None, None, None)) # (bN, bK, RestN, RestK, RestL) gB_nkl = cute.local_tile(mB_nkl, cute.slice_(self.mma_tiler, (0, None, None)), (None, None, None)) # (bM, bK, RestM, RestK, RestL) gSFA_mkl = cute.local_tile(mSFA_mkl, cute.slice_(self.mma_tiler, (None, 0, None)), (None, None, None)) # (bN, bK, RestN, RestK, RestL) gSFB_nkl = cute.local_tile( mSFB_nkl, cute.slice_(self.mma_tiler_sfb, (0, None, None)), (None, None, None), ) # (bM, bN, RestM, RestN, RestL) gC_mnl = cute.local_tile(mC_mnl, cute.slice_(self.mma_tiler_c, (None, None, 0)), (None, None, None)) # (bM, bN, RestM, RestN, RestL) gAB12_mnl = cute.local_tile( mAB12_mnl, cute.slice_(self.mma_tiler, (None, None, 0)), (None, None, None), ) k_tile_cnt = cute.size(gA_mkl, mode=[3]) # # Partition global tensor for TiledMMA_A/B/C # thr_mma = tiled_mma.get_slice(mma_tile_coord_v) thr_mma_sfb = tiled_mma_sfb.get_slice(mma_tile_coord_v) # (MMA, MMA_M, MMA_K, RestM, RestK, RestL) tCgA = thr_mma.partition_A(gA_mkl) # (MMA, MMA_N, MMA_K, RestN, RestK, RestL) tCgB = thr_mma.partition_B(gB_nkl) # (MMA, MMA_M, MMA_K, RestM, RestK, RestL) tCgSFA = thr_mma.partition_A(gSFA_mkl) # (MMA, MMA_N, MMA_K, RestN, RestK, RestL) tCgSFB = thr_mma_sfb.partition_B(gSFB_nkl) # (MMA, MMA_M, MMA_N, RestM, RestN, RestL) tCgC = thr_mma.partition_C(gC_mnl) # (MMA, MMA_M, MMA_N, RestM, RestN, RestL) tCgAB12 = thr_mma.partition_C(gAB12_mnl) # # Partition global/shared tensor for TMA load A/B # # TMA load A partition_S/D a_cta_layout = cute.make_layout(cute.slice_(cluster_layout_vmnk, (0, 0, None, 0)).shape) # ((atom_v, rest_v), STAGE) # ((atom_v, rest_v), RestM, RestK, RestL) tAsA, tAgA = cpasync.tma_partition( tma_atom_a, block_in_cluster_coord_vmnk[2], a_cta_layout, cute.group_modes(sA, 0, 3), cute.group_modes(tCgA, 0, 3), ) # TMA load B partition_S/D b_cta_layout = cute.make_layout(cute.slice_(cluster_layout_vmnk, (0, None, 0, 0)).shape) # ((atom_v, rest_v), STAGE) # ((atom_v, rest_v), RestN, RestK, RestL) tBsB, tBgB = cpasync.tma_partition( tma_atom_b, block_in_cluster_coord_vmnk[1], b_cta_layout, cute.group_modes(sB, 0, 3), cute.group_modes(tCgB, 0, 3), ) # TMA load SFA partition_S/D sfa_cta_layout = a_cta_layout # ((atom_v, rest_v), STAGE) # ((atom_v, rest_v), RestM, RestK, RestL) tAsSFA, tAgSFA = cute.nvgpu.cpasync.tma_partition( tma_atom_sfa, block_in_cluster_coord_vmnk[2], sfa_cta_layout, cute.group_modes(sSFA, 0, 3), cute.group_modes(tCgSFA, 0, 3), ) tAsSFA = cute.filter_zeros(tAsSFA) tAgSFA = cute.filter_zeros(tAgSFA) # TMA load SFB partition_S/D sfb_cta_layout = cute.make_layout(cute.slice_(cluster_layout_sfb_vmnk, (0, None, 0, 0)).shape) # ((atom_v, rest_v), STAGE) # ((atom_v, rest_v), RestN, RestK, RestL) tBsSFB, tBgSFB = cute.nvgpu.cpasync.tma_partition( tma_atom_sfb, block_in_cluster_coord_sfb_vmnk[1], sfb_cta_layout, cute.group_modes(sSFB, 0, 3), cute.group_modes(tCgSFB, 0, 3), ) tBsSFB = cute.filter_zeros(tBsSFB) tBgSFB = cute.filter_zeros(tBgSFB) # # Partition shared/tensor memory tensor for TiledMMA_A/B/C # # (MMA, MMA_M, MMA_K, STAGE) tCrA = tiled_mma.make_fragment_A(sA) # (MMA, MMA_N, MMA_K, STAGE) tCrB = tiled_mma.make_fragment_B(sB) # (MMA, MMA_M, MMA_N) acc_shape = tiled_mma.partition_shape_C(self.mma_tiler[:2]) # (MMA, MMA_M, MMA_N, STAGE) tCtAcc_fake = tiled_mma.make_fragment_C(cute.append(acc_shape, self.num_acc_stage)) # # Cluster wait before tensor memory alloc # pipeline_init_wait(cluster_shape_mn=self.cluster_shape_mn) # # Specialized TMA load warp # if warp_idx == self.tma_warp_id: # # Persistent tile scheduling loop # tile_sched = utils.StaticPersistentTileScheduler.create(tile_sched_params, cute.arch.block_idx(), cute.arch.grid_dim()) work_tile = tile_sched.initial_work_tile_info() ab_producer_state = pipeline.make_pipeline_state(pipeline.PipelineUserType.Producer, self.num_ab_stage) while work_tile.is_valid_tile: # Get tile coord from tile scheduler cur_tile_coord = work_tile.tile_idx mma_tile_coord_mnl = ( cur_tile_coord[0] // cute.size(tiled_mma.thr_id.shape), cur_tile_coord[1], cur_tile_coord[2], ) # # Slice to per mma tile index # # ((atom_v, rest_v), RestK) tAgA_slice = tAgA[(None, mma_tile_coord_mnl[0], None, mma_tile_coord_mnl[2])] # ((atom_v, rest_v), RestK) tBgB_slice = tBgB[(None, mma_tile_coord_mnl[1], None, mma_tile_coord_mnl[2])] # ((atom_v, rest_v), RestK) tAgSFA_slice = tAgSFA[(None, mma_tile_coord_mnl[0], None, mma_tile_coord_mnl[2])] # Apply SFB slicing hack when cta_tile_shape_n=64 # {$nv-internal-release} slice_n = mma_tile_coord_mnl[1] if cutlass.const_expr(self.cta_tile_shape_mnk[1] == 64): slice_n = mma_tile_coord_mnl[1] // 2 # ((atom_v, rest_v), RestK) tBgSFB_slice = tBgSFB[(None, slice_n, None, mma_tile_coord_mnl[2])] # Peek (try_wait) AB buffer empty for k_tile = prefetch_k_tile_cnt ab_producer_state.reset_count() peek_ab_empty_status = cutlass.Boolean(1) if ab_producer_state.count < k_tile_cnt: peek_ab_empty_status = ab_pipeline.producer_try_acquire(ab_producer_state) # # Tma load loop # for k_tile in cutlass.range(0, k_tile_cnt, 1, unroll=1): # Conditionally wait for AB buffer empty ab_pipeline.producer_acquire(ab_producer_state, peek_ab_empty_status) # TMA load A/B/SFA/SFB cute.copy( tma_atom_a, tAgA_slice[(None, ab_producer_state.count)], tAsA[(None, ab_producer_state.index)], tma_bar_ptr=ab_pipeline.producer_get_barrier(ab_producer_state), mcast_mask=a_full_mcast_mask, ) cute.copy( tma_atom_b, tBgB_slice[(None, ab_producer_state.count)], tBsB[(None, ab_producer_state.index)], tma_bar_ptr=ab_pipeline.producer_get_barrier(ab_producer_state), mcast_mask=b_full_mcast_mask, ) cute.copy( tma_atom_sfa, tAgSFA_slice[(None, ab_producer_state.count)], tAsSFA[(None, ab_producer_state.index)], tma_bar_ptr=ab_pipeline.producer_get_barrier(ab_producer_state), mcast_mask=sfa_full_mcast_mask, ) cute.copy( tma_atom_sfb, tBgSFB_slice[(None, ab_producer_state.count)], tBsSFB[(None, ab_producer_state.index)], tma_bar_ptr=ab_pipeline.producer_get_barrier(ab_producer_state), mcast_mask=sfb_full_mcast_mask, ) # Peek (try_wait) AB buffer empty for k_tile = prefetch_k_tile_cnt + k_tile + 1 ab_producer_state.advance() peek_ab_empty_status = cutlass.Boolean(1) if ab_producer_state.count < k_tile_cnt: peek_ab_empty_status = ab_pipeline.producer_try_acquire(ab_producer_state) # # Advance to next tile # tile_sched.advance_to_next_work() work_tile = tile_sched.get_current_work() # # Wait A/B buffer empty # ab_pipeline.producer_tail(ab_producer_state) # # Specialized MMA warp # if warp_idx == self.mma_warp_id: # # Bar sync for retrieve tensor memory ptr from shared mem # tmem.wait_for_alloc() # # Retrieving tensor memory ptr and make accumulator/SFA/SFB tensor # acc_tmem_ptr = tmem.retrieve_ptr(self.acc_dtype) # Make accumulator tmem tensor # (MMA, MMA_M, MMA_N, STAGE) tCtAcc_base = cute.make_tensor(acc_tmem_ptr, tCtAcc_fake.layout) # Make SFA tmem tensor sfa_tmem_ptr = cute.recast_ptr( acc_tmem_ptr + tcgen05.find_tmem_tensor_col_offset(tCtAcc_base), dtype=self.sf_dtype, ) # (MMA, MMA_M, MMA_K) tCtSFA_layout = blockscaled_utils.make_tmem_layout_sfa( tiled_mma, self.mma_tiler, self.sf_vec_size, cute.slice_(sfa_smem_layout_staged, (None, None, None, 0)), ) tCtSFA = cute.make_tensor(sfa_tmem_ptr, tCtSFA_layout) # Make SFB tmem tensor sfb_tmem_ptr = cute.recast_ptr( acc_tmem_ptr + tcgen05.find_tmem_tensor_col_offset(tCtAcc_base) + tcgen05.find_tmem_tensor_col_offset(tCtSFA), dtype=self.sf_dtype, ) # (MMA, MMA_N, MMA_K) tCtSFB_layout = blockscaled_utils.make_tmem_layout_sfb( tiled_mma, self.mma_tiler, self.sf_vec_size, cute.slice_(sfb_smem_layout_staged, (None, None, None, 0)), ) tCtSFB = cute.make_tensor(sfb_tmem_ptr, tCtSFB_layout) # # Partition for S2T copy of SFA/SFB # ( tiled_copy_s2t_sfa, tCsSFA_compact_s2t, tCtSFA_compact_s2t, ) = self.mainloop_s2t_copy_and_partition(sSFA, tCtSFA) ( tiled_copy_s2t_sfb, tCsSFB_compact_s2t, tCtSFB_compact_s2t, ) = self.mainloop_s2t_copy_and_partition(sSFB, tCtSFB) # # Persistent tile scheduling loop # tile_sched = utils.StaticPersistentTileScheduler.create(tile_sched_params, cute.arch.block_idx(), cute.arch.grid_dim()) work_tile = tile_sched.initial_work_tile_info() ab_consumer_state = pipeline.make_pipeline_state(pipeline.PipelineUserType.Consumer, self.num_ab_stage) acc_producer_state = pipeline.make_pipeline_state(pipeline.PipelineUserType.Producer, self.num_acc_stage) while work_tile.is_valid_tile: # Get tile coord from tile scheduler cur_tile_coord = work_tile.tile_idx mma_tile_coord_mnl = ( cur_tile_coord[0] // cute.size(tiled_mma.thr_id.shape), cur_tile_coord[1], cur_tile_coord[2], ) # Set tensor memory buffer for current tile # (MMA, MMA_M, MMA_N) tCtAcc = tCtAcc_base[(None, None, None, acc_producer_state.index)] # Peek (try_wait) AB buffer full for k_tile = 0 ab_consumer_state.reset_count() peek_ab_full_status = cutlass.Boolean(1) if ab_consumer_state.count < k_tile_cnt and is_leader_cta: peek_ab_full_status = ab_pipeline.consumer_try_wait(ab_consumer_state) # # Wait for accumulator buffer empty # if is_leader_cta: acc_pipeline.producer_acquire(acc_producer_state) # Apply TMEM pointer offset hack when cta_tile_shape_n=192 or cta_tile_shape_n=64 # {$nv-internal-release} tCtSFB_mma = tCtSFB if cutlass.const_expr(self.cta_tile_shape_mnk[1] == 192): # If this is an ODD tile, shift the TMEM start address for cta_tile_shape_n=192 case by two words (ignores first 64 columns of SFB) offset = cutlass.Int32(2) if mma_tile_coord_mnl[1] % 2 == 1 else cutlass.Int32(0) shifted_ptr = cute.recast_ptr( acc_tmem_ptr + tcgen05.find_tmem_tensor_col_offset(tCtAcc_base) + tcgen05.find_tmem_tensor_col_offset(tCtSFA) + offset, dtype=self.sf_dtype, ) tCtSFB_mma = cute.make_tensor(shifted_ptr, tCtSFB_layout) elif cutlass.const_expr(self.cta_tile_shape_mnk[1] == 64): # Move in increments of 64 columns of SFB offset = cutlass.Int32((mma_tile_coord_mnl[1] % 2) * 2) shifted_ptr = cute.recast_ptr( acc_tmem_ptr + tcgen05.find_tmem_tensor_col_offset(tCtAcc_base) + tcgen05.find_tmem_tensor_col_offset(tCtSFA) + offset, dtype=self.sf_dtype, ) tCtSFB_mma = cute.make_tensor(shifted_ptr, tCtSFB_layout) # # Reset the ACCUMULATE field for each tile # tiled_mma.set(tcgen05.Field.ACCUMULATE, False) # # Mma mainloop # for k_tile in range(k_tile_cnt): if is_leader_cta: # Conditionally wait for AB buffer full ab_pipeline.consumer_wait(ab_consumer_state, peek_ab_full_status) # Copy SFA/SFB from smem to tmem s2t_stage_coord = ( None, None, None, None, ab_consumer_state.index, ) tCsSFA_compact_s2t_staged = tCsSFA_compact_s2t[s2t_stage_coord] tCsSFB_compact_s2t_staged = tCsSFB_compact_s2t[s2t_stage_coord] cute.copy( tiled_copy_s2t_sfa, tCsSFA_compact_s2t_staged, tCtSFA_compact_s2t, ) cute.copy( tiled_copy_s2t_sfb, tCsSFB_compact_s2t_staged, tCtSFB_compact_s2t, ) # tCtAcc += tCrA * tCrSFA * tCrB * tCrSFB num_kblocks = cute.size(tCrA, mode=[2]) for kblock_idx in cutlass.range(num_kblocks, unroll_full=True): kblock_coord = ( None, None, kblock_idx, ab_consumer_state.index, ) # Set SFA/SFB tensor to tiled_mma sf_kblock_coord = (None, None, kblock_idx) tiled_mma.set( tcgen05.Field.SFA, tCtSFA[sf_kblock_coord].iterator, ) tiled_mma.set( tcgen05.Field.SFB, tCtSFB_mma[sf_kblock_coord].iterator, ) cute.gemm( tiled_mma, tCtAcc, tCrA[kblock_coord], tCrB[kblock_coord], tCtAcc, ) # Enable accumulate on tCtAcc after first kblock tiled_mma.set(tcgen05.Field.ACCUMULATE, True) # Async arrive AB buffer empty ab_pipeline.consumer_release(ab_consumer_state) # Peek (try_wait) AB buffer full for k_tile = k_tile + 1 ab_consumer_state.advance() peek_ab_full_status = cutlass.Boolean(1) if ab_consumer_state.count < k_tile_cnt: if is_leader_cta: peek_ab_full_status = ab_pipeline.consumer_try_wait(ab_consumer_state) # # Async arrive accumulator buffer full # if is_leader_cta: acc_pipeline.producer_commit(acc_producer_state) acc_producer_state.advance() # # Advance to next tile # tile_sched.advance_to_next_work() work_tile = tile_sched.get_current_work() # # Wait for accumulator buffer empty # acc_pipeline.producer_tail(acc_producer_state) # # Specialized epilogue warps # if warp_idx < self.mma_warp_id: # # Alloc tensor memory buffer # tmem.allocate(self.num_tmem_alloc_cols) # # Bar sync for retrieve tensor memory ptr from shared memory # tmem.wait_for_alloc() # # Retrieving tensor memory ptr and make accumulator tensor # acc_tmem_ptr = tmem.retrieve_ptr(self.acc_dtype) # (MMA, MMA_M, MMA_N, STAGE) tCtAcc_base = cute.make_tensor(acc_tmem_ptr, tCtAcc_fake.layout) # # Partition for epilogue # epi_tidx = tidx ( tiled_copy_t2r, tTR_tAcc_base, tTR_rAcc_up, tTR_rAcc_gate, ) = self.epilog_tmem_copy_and_partition(epi_tidx, tCtAcc_base, tCgC, epi_tile, use_2cta_instrs) tTR_rC = cute.make_rmem_tensor(tTR_rAcc_up.shape, self.c_dtype) tiled_copy_r2s, tRS_rC, tRS_sC = self.epilog_smem_copy_and_partition(tiled_copy_t2r, tTR_rC, epi_tidx, sC) ( bSG_sC, bSG_gC_mnl, ) = self.epilog_gmem_copy_and_partition(epi_tidx, tma_atom_c, tCgC, epi_tile, sC) tTR_rAB12 = cute.make_rmem_tensor(tTR_rAcc_up.shape, self.ab12_dtype) _, tRS_rAB12, tRS_sAB12 = self.epilog_smem_copy_and_partition(tiled_copy_t2r, tTR_rAB12, epi_tidx, sAB12) ( bSG_sAB12, bSG_gAB12_mnl, ) = self.epilog_gmem_copy_and_partition(epi_tidx, tma_atom_ab12, tCgAB12, epi_tile_ab12, sAB12) # # Persistent tile scheduling loop # tile_sched = utils.StaticPersistentTileScheduler.create(tile_sched_params, cute.arch.block_idx(), cute.arch.grid_dim()) work_tile = tile_sched.initial_work_tile_info() acc_consumer_state = pipeline.make_pipeline_state(pipeline.PipelineUserType.Consumer, self.num_acc_stage) # Threads/warps participating in tma store pipeline c_producer_group = pipeline.CooperativeGroup( pipeline.Agent.Thread, 32 * len(self.epilog_warp_id), ) c_pipeline = pipeline.PipelineTmaStore.create( num_stages=self.num_c_stage, producer_group=c_producer_group, ) ab12_producer_group = pipeline.CooperativeGroup( pipeline.Agent.Thread, 32 * len(self.epilog_warp_id), ) ab12_pipeline = pipeline.PipelineTmaStore.create( num_stages=self.num_ab12_stage, producer_group=ab12_producer_group, ) # norm_const when used in sfc if cutlass.const_expr(self.generate_sfc): norm_const = norm_const_tensor[0] regPerSubtile = 4 sfc_tile = (cute.make_layout(128), cute.make_layout(32 * regPerSubtile)) # (EPI_TILE_M, EPI_TILE_N, RestM, RestN, RestL) gSFC_mnl = cute.local_tile(mSFC_mnl, sfc_tile, (None, None, None)) thr_copy_t2r = tiled_copy_t2r.get_slice(tidx) tCgSFC_mnl = thr_copy_t2r.partition_D(gSFC_mnl) tCgSFC_mnl = cute.filter_zeros(tCgSFC_mnl) # ((T2R, T2R_M, T2R_N), SUBTILLE_IDX) # ((1,1),1,4):((0,0),0,1) tCrSFC = cute.make_rmem_tensor(tCgSFC_mnl[(None, None, None, 0, 0, 0)].layout, self.sf_dtype) tCrSFC_pvscale = cute.make_rmem_tensor_like(tCrSFC, cutlass.Float32) tCrSFC_qpvscale_up_fp32 = cute.make_rmem_tensor_like(tCrSFC, cutlass.Float32) while work_tile.is_valid_tile: # Get tile coord from tile scheduler cur_tile_coord = work_tile.tile_idx mma_tile_coord_mnl = ( cur_tile_coord[0] // cute.size(tiled_mma.thr_id.shape), cur_tile_coord[1], cur_tile_coord[2], ) # # Slice to per mma tile index # # ((ATOM_V, REST_V), EPI_M, EPI_N) bSG_gC = bSG_gC_mnl[ ( None, None, None, *mma_tile_coord_mnl, ) ] bSG_gAB12 = bSG_gAB12_mnl[ ( None, None, None, *mma_tile_coord_mnl, ) ] # Set tensor memory buffer for current tile # (T2R, T2R_M, T2R_N, EPI_M, EPI_M) tTR_tAcc = tTR_tAcc_base[(None, None, None, None, None, acc_consumer_state.index)] # Initialize thread-local amax accumulator for this tile # Use 0.0 as initial value since we're computing absolute maximum if cutlass.const_expr(self.generate_amax): thread_tile_amax = cutlass.Float32(0.0) # # Wait for accumulator buffer full # acc_pipeline.consumer_wait(acc_consumer_state) tTR_tAcc = cute.group_modes(tTR_tAcc, 3, cute.rank(tTR_tAcc)) bSG_gC = cute.group_modes(bSG_gC, 1, cute.rank(bSG_gC)) bSG_gAB12 = cute.group_modes(bSG_gAB12, 1, cute.rank(bSG_gAB12)) # # Store accumulator to global memory in subtiles # subtile_cnt = cute.size(tTR_tAcc.shape, mode=[3]) ## tTR_tAcc.shape: (((32, 32), 1), 1, 1, (1, 8)) num_prev_subtiles = tile_sched.num_tiles_executed * subtile_cnt for subtile_idx in cutlass.range(0, subtile_cnt, 2): # Calculate subtile index for C output (one output per two input subtiles) sfc_subtile_idx = subtile_idx // 2 # # Load accumulator from tensor memory buffer to register # tTR_tAcc_mn_up = tTR_tAcc[(None, None, None, subtile_idx)] tTR_tAcc_mn_gate = tTR_tAcc[(None, None, None, subtile_idx + 1)] cute.copy(tiled_copy_t2r, tTR_tAcc_mn_up, tTR_rAcc_up) cute.copy(tiled_copy_t2r, tTR_tAcc_mn_gate, tTR_rAcc_gate) # # Convert to C type # acc_vec_up = tiled_copy_r2s.retile(tTR_rAcc_up) acc_vec_gate = tiled_copy_r2s.retile(tTR_rAcc_gate) # # Apply alpha # acc_vec_up_ = acc_vec_up.load() acc_vec_gate_ = acc_vec_gate.load() acc_vec_up_ = acc_vec_up_ * alpha acc_vec_gate_ = acc_vec_gate_ * alpha acc_vec_up.store(acc_vec_up_) acc_vec_gate.store(acc_vec_gate_) # # Store AB12 to shared memory for bprop # AB12_buffer = (num_prev_subtiles + sfc_subtile_idx) % self.num_ab12_stage # Convert to ab12_dtype before storing # Load, convert type, and store back to temporary register tensor # tTR_rAB12_up = cute.make_rmem_tensor(tTR_tAcc_mn_up.shape, self.ab12_dtype) # tTR_rAB12_gate = cute.make_rmem_tensor(tTR_tAcc_mn_gate.shape, self.ab12_dtype) tRS_rAB12.store(acc_vec_up.load().to(self.ab12_dtype)) cute.copy( tiled_copy_r2s, tRS_rAB12[(None, None, 0)], tRS_sAB12[(None, None, 0, AB12_buffer)], ) tRS_rAB12.store(acc_vec_gate_.to(self.ab12_dtype)) cute.copy( tiled_copy_r2s, tRS_rAB12[(None, None, 0)], # ((1, 32), 1, 1), ((0, 1), 0, 0) tRS_sAB12[(None, None, 1, AB12_buffer)], # ((1, 32), 1, 2, (1, 1)), ((0, 1), 0, 32, (0, 0)) ) # Fence and barrier to make sure shared memory store is visible to TMA store cute.arch.fence_proxy( cute.arch.ProxyKind.async_shared, space=cute.arch.SharedSpace.shared_cta, ) self.epilog_sync_barrier.arrive_and_wait() # # TMA store AB12 to global memory # if warp_idx == self.epilog_warp_id[0]: cute.copy( tma_atom_ab12, bSG_sAB12[(None, sfc_subtile_idx % self.num_ab12_stage)], # ((8192, 1), (1, 4)), ((1, 0), (0, 8192)) bSG_gAB12[(None, sfc_subtile_idx)], # (((64, 128), 1), (1, 4)) : (((1@0,1@1),0),(0,64@0)) ) # Fence and barrier to make sure shared memory store is visible to TMA store ab12_pipeline.producer_commit() ab12_pipeline.producer_acquire() self.epilog_sync_barrier.arrive_and_wait() # SwiGelu tCompute = cute.make_rmem_tensor(acc_vec_gate.shape, self.acc_dtype) if cutlass.const_expr(self.vector_f32): # SwiGelu Packed Version LOG2_E = cutlass.Float32(1.4426950408889634) for i in cutlass.range(0, cute.size(acc_vec_gate), 2, unroll_full=True): tCompute_log2e = cute.arch.mul_packed_f32x2( (acc_vec_gate[i], acc_vec_gate[i + 1]), (-LOG2_E, -LOG2_E), ) ## replace to add_packed_f32x2 when no precision issue. tCompute[i + 0] = cute.math.exp2(tCompute_log2e[0], fastmath=True) + 1.0 tCompute[i + 1] = cute.math.exp2(tCompute_log2e[1], fastmath=True) + 1.0 tCompute[i + 0] = cute.arch.rcp_approx(tCompute[i + 0]) tCompute[i + 1] = cute.arch.rcp_approx(tCompute[i + 1]) ( tCompute[i + 0], tCompute[i + 1], ) = cute.arch.mul_packed_f32x2( (tCompute[i], tCompute[i + 1]), (acc_vec_gate[i], acc_vec_gate[i + 1]), ) ( tCompute[i + 0], tCompute[i + 1], ) = cute.arch.mul_packed_f32x2( (tCompute[i], tCompute[i + 1]), (acc_vec_up[i], acc_vec_up[i + 1]), ) else: # SwiGelu Unpacked Version for i in cutlass.range(0, cute.size(acc_vec_gate), 1, unroll_full=True): tCompute[i] = acc_vec_up[i] * silu_f32(acc_vec_gate[i], fastmath=True) # # Generate amax # if cutlass.const_expr(self.generate_amax): acc_values = tCompute.load() # Apply element-wise absolute value using math.absf (supports vectors) abs_acc_values_ir = cutlass._mlir.dialects.math.absf(acc_values.ir_value()) # operand (positional) abs_acc_values = type(acc_values)(abs_acc_values_ir, acc_values.shape, acc_values.dtype) subtile_amax = abs_acc_values.reduce( cute.ReductionOp.MAX, cutlass.Float32(0.0), 0, # Use 0.0 as init for abs values ) thread_tile_amax = cute.arch.fmax(thread_tile_amax, subtile_amax) # # Generate sfc # if cutlass.const_expr(self.generate_sfc): # # generate sfc, and store to shared memory # # tCgSFC_mnl: 256x512 => ((1,1),1,4,2,2,(1,1)):((0,0),0,1,1024,512,(0,2048)) tCgSFC = tCgSFC_mnl[ ( None, None, None, *cur_tile_coord, ) ] # # Get absolute max across a vector and Compute SFC # tTR_rAcc_frg = cute.logical_divide(tCompute, cute.make_layout(self.sf_vec_size)) acc_frg = tTR_rAcc_frg.load() acc_frg = epilogue_op(acc_frg) # Apply element-wise absolute value using math.absf (supports vectors) abs_acc_frg_ir = cutlass._mlir.dialects.math.absf(acc_frg.ir_value()) abs_acc_frg = type(acc_frg)(abs_acc_frg_ir, acc_frg.shape, acc_frg.dtype) if cutlass.const_expr(self.vector_f32): tCrSFC_pvscale_subtile = tCrSFC_pvscale[None, None, sfc_subtile_idx] for vi in cutlass.range_constexpr(abs_acc_frg.shape[1]): tCrSFC_pvscale_subtile[vi] = abs_acc_frg[None, vi].reduce( cute.ReductionOp.MAX, cutlass.Float32(0.0), 0, # Use 0.0 as init for abs values ) for vi in cutlass.range_constexpr(0, abs_acc_frg.shape[1], 2): ( tCrSFC_pvscale_subtile[vi], tCrSFC_pvscale_subtile[vi + 1], ) = cute.arch.mul_packed_f32x2( ( tCrSFC_pvscale_subtile[vi], tCrSFC_pvscale_subtile[vi + 1], ), ( self.get_dtype_rcp_limits(self.c_dtype), self.get_dtype_rcp_limits(self.c_dtype), ), ) ( tCrSFC_pvscale_subtile[vi], tCrSFC_pvscale_subtile[vi + 1], ) = cute.arch.mul_packed_f32x2( ( tCrSFC_pvscale_subtile[vi], tCrSFC_pvscale_subtile[vi + 1], ), (norm_const, norm_const), ) else: for vi in cutlass.range_constexpr(abs_acc_frg.shape[1]): tCrSFC_pvscale[None, None, sfc_subtile_idx][vi] = ( abs_acc_frg[None, vi].reduce( cute.ReductionOp.MAX, cutlass.Float32(0.0), 0, # Use 0.0 as init for abs values ) * self.get_dtype_rcp_limits(self.c_dtype) * norm_const ) # TODO: need to investigate f32x2 -> f8x2 conversion if sfc_subtile_idx == 3: # 3 is the last subtile to composite SFC to a reg # # convert SFC from fp32 to sf_dtype # tCrSFC.store(tCrSFC_pvscale.load().to(self.sf_dtype)) # # Store SFC to global memory # # TODO: Need to think about predicate on it # Current no need as worload is a multiple of 32 # if cute.elem_less(): cute.autovec_copy(tCrSFC, tCgSFC) # # Compute quantized output values and convert to C type # # TODO: need to investigate f8x2 -> f32x2 conversion # TODO: check E8M0 upcast fast mode ## tCrSFC_qpvscale_up = tCrSFC_pvscale[None, None, sfc_subtile_idx] tCrSFC.store(tCrSFC_pvscale.load().to(self.sf_dtype)) tCrSFC_qpvscale_up_fp32.store(tCrSFC.load().to(cutlass.Float32)) tCrSFC_qpvscale_up = tCrSFC_qpvscale_up_fp32[None, None, sfc_subtile_idx] fp32_max = cutlass.Float32(3.40282346638528859812e38) if cutlass.const_expr(self.vector_f32): for vi in cutlass.range_constexpr(0, cute.size(tCrSFC_qpvscale_up), 2): acc_scale = cute.arch.mul_packed_f32x2( ( cute.arch.rcp_approx(tCrSFC_qpvscale_up[vi]), cute.arch.rcp_approx(tCrSFC_qpvscale_up[vi + 1]), ), (norm_const, norm_const), ) acc_scale_min0 = fmin(acc_scale[0], fp32_max, nan=True) acc_scale_min1 = fmin(acc_scale[1], fp32_max, nan=True) vec0 = tTR_rAcc_frg[None, vi] vec1 = tTR_rAcc_frg[None, vi + 1] for ei in cutlass.range_constexpr(self.sf_vec_size): vec0[ei], vec1[ei] = cute.arch.mul_packed_f32x2( (vec0[ei], vec1[ei]), (acc_scale_min0, acc_scale_min1), ) else: for vi in cutlass.range_constexpr(cute.size(tCrSFC_qpvscale_up)): acc_scale = norm_const * cute.arch.rcp_approx(tCrSFC_qpvscale_up[vi]) acc_scale = fmin(acc_scale, fp32_max, nan=True) vec = tTR_rAcc_frg[None, vi] for ei in cutlass.range_constexpr(self.sf_vec_size): vec[ei] = vec[ei] * acc_scale acc_vec = tiled_copy_r2s.retile(tCompute).load() tRS_rC.store(acc_vec.to(self.c_dtype)) else: # # Convert to C type # acc_vec = tiled_copy_r2s.retile(tCompute).load() acc_vec = epilogue_op(acc_vec.to(self.c_dtype)) tRS_rC.store(acc_vec) # # Store C to shared memory # c_buffer = (num_prev_subtiles + sfc_subtile_idx) % self.num_c_stage cute.copy( tiled_copy_r2s, tRS_rC, tRS_sC[(None, None, None, c_buffer)], ) # Fence and barrier to make sure shared memory store is visible to TMA store cute.arch.fence_proxy( cute.arch.ProxyKind.async_shared, space=cute.arch.SharedSpace.shared_cta, ) self.epilog_sync_barrier.arrive_and_wait() # # TMA store C to global memory # if warp_idx == self.epilog_warp_id[0]: cute.copy( tma_atom_c, bSG_sC[(None, c_buffer)], bSG_gC[(None, sfc_subtile_idx)], ) # Fence and barrier to make sure shared memory store is visible to TMA store c_pipeline.producer_commit() c_pipeline.producer_acquire() self.epilog_sync_barrier.arrive_and_wait() # Perform amax reduction after all subtiles are processed if cutlass.const_expr(self.generate_amax): warp_amax = cute.arch.warp_reduction_max( thread_tile_amax, threads_in_group=32, ) # Each epilogue warp's lane 0 writes warp amax to shared memory if cute.arch.lane_idx() == 0: sAmax[warp_idx] = cutlass.Float32(warp_amax) # Ensure all epilogue warps complete their writes before block reduction self.epilog_sync_barrier.arrive_and_wait() # Block-level reduction: only first epilogue warp's lane 0 handles this if warp_idx == self.epilog_warp_id[0] and cute.arch.lane_idx() == 0: block_amax = cutlass.Float32(0.0) # Initial value for absolute maximum for i in cutlass.range(self.num_epilog_warps): warp_amax_val = sAmax[i] block_amax = cute.arch.fmax(block_amax, warp_amax_val) # Global atomic max (accumulates across all tiles for final tensor amax) # Since we compute absolute values, all values are non-negative _value_int = cutlass._mlir.dialects.llvm.bitcast( cutlass.cutlass_dsl.T.i32(), block_amax.ir_value(), loc=None, ip=None, ) _old_value_int = cutlass._mlir.dialects.nvvm.atomicrmw( res=cutlass.cutlass_dsl.T.i32(), op=cutlass._mlir.dialects.nvvm.AtomicOpKind.MAX, ptr=mAmax_tensor.iterator.llvm_ptr, a=_value_int, loc=None, ip=None, ) _ = cutlass.Float32( cutlass._mlir.dialects.llvm.bitcast( cutlass.cutlass_dsl.T.f32(), _old_value_int, loc=None, ip=None, ) ) # # Async arrive accumulator buffer empty # with cute.arch.elect_one(): acc_pipeline.consumer_release(acc_consumer_state) acc_consumer_state.advance() # # Advance to next tile # tile_sched.advance_to_next_work() work_tile = tile_sched.get_current_work() # # Dealloc the tensor memory buffer # tmem.relinquish_alloc_permit() self.epilog_sync_barrier.arrive_and_wait() tmem.free(acc_tmem_ptr) # # Wait for C store complete # c_pipeline.producer_tail() ab12_pipeline.producer_tail() def mainloop_s2t_copy_and_partition( self, sSF: cute.Tensor, tSF: cute.Tensor, ) -> Tuple[cute.TiledCopy, cute.Tensor, cute.Tensor]: """ Make tiledCopy for smem to tmem load for scale factor tensor, then use it to partition smem memory (source) and tensor memory (destination). :param sSF: The scale factor tensor in smem :type sSF: cute.Tensor :param tSF: The scale factor tensor in tmem :type tSF: cute.Tensor :return: A tuple containing (tiled_copy_s2t, tCsSF_compact_s2t, tCtSF_compact_s2t) where: - tiled_copy_s2t: The tiled copy operation for smem to tmem load for scale factor tensor(s2t) - tCsSF_compact_s2t: The partitioned scale factor tensor in smem - tSF_compact_s2t: The partitioned scale factor tensor in tmem :rtype: Tuple[cute.TiledCopy, cute.Tensor, cute.Tensor] """ # (MMA, MMA_MN, MMA_K, STAGE) tCsSF_compact = cute.filter_zeros(sSF) # (MMA, MMA_MN, MMA_K) tCtSF_compact = cute.filter_zeros(tSF) # Make S2T CopyAtom and tiledCopy copy_atom_s2t = cute.make_copy_atom( tcgen05.Cp4x32x128bOp(self.cta_group), self.sf_dtype, ) tiled_copy_s2t = tcgen05.make_s2t_copy(copy_atom_s2t, tCtSF_compact) thr_copy_s2t = tiled_copy_s2t.get_slice(0) # ((ATOM_V, REST_V), Rest_Tiler, MMA_MN, MMA_K, STAGE) tCsSF_compact_s2t_ = thr_copy_s2t.partition_S(tCsSF_compact) # ((ATOM_V, REST_V), Rest_Tiler, MMA_MN, MMA_K, STAGE) tCsSF_compact_s2t = tcgen05.get_s2t_smem_desc_tensor(tiled_copy_s2t, tCsSF_compact_s2t_) # ((ATOM_V, REST_V), Rest_Tiler, MMA_MN, MMA_K) tCtSF_compact_s2t = thr_copy_s2t.partition_D(tCtSF_compact) return tiled_copy_s2t, tCsSF_compact_s2t, tCtSF_compact_s2t def epilog_tmem_copy_and_partition( self, tidx: cutlass.Int32, tAcc: cute.Tensor, gC_mnl: cute.Tensor, epi_tile: cute.Tile, use_2cta_instrs: Union[cutlass.Boolean, bool], ) -> Tuple[cute.TiledCopy, cute.Tensor, cute.Tensor, cute.Tensor]: """ Make tiledCopy for tensor memory load, then use it to partition tensor memory (source) and register array (destination). :param tidx: The thread index in epilogue warp groups :type tidx: cutlass.Int32 :param tAcc: The accumulator tensor to be copied and partitioned :type tAcc: cute.Tensor :param gC_mnl: The global tensor C :type gC_mnl: cute.Tensor :param epi_tile: The epilogue tiler :type epi_tile: cute.Tile :param use_2cta_instrs: Whether use_2cta_instrs is enabled :type use_2cta_instrs: bool :return: A tuple containing (tiled_copy_t2r, tTR_tAcc, tTR_rAcc) where: - tiled_copy_t2r: The tiled copy operation for tmem to register copy(t2r) - tTR_tAcc: The partitioned accumulator tensor - tTR_rAcc_up: The partitioned accumulator tensor for acc up - tTR_rAcc_gate: The partitioned accumulator tensor for acc gate :rtype: Tuple[cute.TiledCopy, cute.Tensor, cute.Tensor, cute.Tensor] """ # Make tiledCopy for tensor memory load copy_atom_t2r = sm100_utils.get_tmem_load_op( self.cta_tile_shape_mnk, self.c_layout, self.c_dtype, self.acc_dtype, epi_tile, use_2cta_instrs, ) # (EPI_TILE_M, EPI_TILE_N, EPI_M, EPI_N, STAGE) tAcc_epi = cute.flat_divide( tAcc[((None, None), 0, 0, None)], epi_tile, ) # (EPI_TILE_M, EPI_TILE_N) tiled_copy_t2r = tcgen05.make_tmem_copy(copy_atom_t2r, tAcc_epi[(None, None, 0, 0, 0)]) thr_copy_t2r = tiled_copy_t2r.get_slice(tidx) # (T2R, T2R_M, T2R_N, EPI_M, EPI_M, STAGE) tTR_tAcc = thr_copy_t2r.partition_S(tAcc_epi) # (EPI_TILE_M, EPI_TILE_N, EPI_M, EPI_N, RestM, RestN, RestL) gC_mnl_epi = cute.flat_divide(gC_mnl[((None, None), 0, 0, None, None, None)], epi_tile) # (T2R, T2R_M, T2R_N, EPI_M, EPI_N, RestM, RestN, RestL) tTR_gC = thr_copy_t2r.partition_D(gC_mnl_epi) # (T2R, T2R_M, T2R_N) tTR_rAcc_up = cute.make_rmem_tensor(tTR_gC[(None, None, None, 0, 0, 0, 0, 0)].shape, self.acc_dtype) # (T2R, T2R_M, T2R_N) tTR_rAcc_gate = cute.make_rmem_tensor(tTR_gC[(None, None, None, 0, 0, 0, 0, 0)].shape, self.acc_dtype) return tiled_copy_t2r, tTR_tAcc, tTR_rAcc_up, tTR_rAcc_gate def epilog_smem_copy_and_partition( self, tiled_copy_t2r: cute.TiledCopy, tTR_rC: cute.Tensor, tidx: cutlass.Int32, sC: cute.Tensor, ) -> Tuple[cute.TiledCopy, cute.Tensor, cute.Tensor]: """ Make tiledCopy for shared memory store, then use it to partition register array (source) and shared memory (destination). :param tiled_copy_t2r: The tiled copy operation for tmem to register copy(t2r) :type tiled_copy_t2r: cute.TiledCopy :param tTR_rC: The partitioned accumulator tensor :type tTR_rC: cute.Tensor :param tidx: The thread index in epilogue warp groups :type tidx: cutlass.Int32 :param sC: The shared memory tensor to be copied and partitioned :type sC: cute.Tensor :return: A tuple containing (tiled_copy_r2s, tRS_rC, tRS_sC) where: - tiled_copy_r2s: The tiled copy operation for register to smem copy(r2s) - tRS_rC: The partitioned tensor C (register source) - tRS_sC: The partitioned tensor C (smem destination) :rtype: Tuple[cute.TiledCopy, cute.Tensor, cute.Tensor] """ copy_atom_r2s = sm100_utils.get_smem_store_op(self.c_layout, self.c_dtype, self.acc_dtype, tiled_copy_t2r) tiled_copy_r2s = cute.make_tiled_copy_D(copy_atom_r2s, tiled_copy_t2r) # (R2S, R2S_M, R2S_N, PIPE) thr_copy_r2s = tiled_copy_r2s.get_slice(tidx) tRS_sC = thr_copy_r2s.partition_D(sC) # (R2S, R2S_M, R2S_N) tRS_rC = tiled_copy_r2s.retile(tTR_rC) return tiled_copy_r2s, tRS_rC, tRS_sC def epilog_gmem_copy_and_partition( self, tidx: cutlass.Int32, atom: Union[cute.CopyAtom, cute.TiledCopy], gC_mnl: cute.Tensor, epi_tile: cute.Tile, sC: cute.Tensor, ) -> Tuple[cute.CopyAtom, cute.Tensor, cute.Tensor]: """Make tiledCopy for global memory store, then use it to: partition shared memory (source) and global memory (destination) for TMA store version. :param tidx: The thread index in epilogue warp groups :type tidx: cutlass.Int32 :param atom: The copy_atom_c to be used for TMA store version, or tiled_copy_t2r for none TMA store version :type atom: cute.CopyAtom or cute.TiledCopy :param gC_mnl: The global tensor C :type gC_mnl: cute.Tensor :param epi_tile: The epilogue tiler :type epi_tile: cute.Tile :param sC: The shared memory tensor to be copied and partitioned :type sC: cute.Tensor :return: A tuple containing (tma_atom_c, bSG_sC, bSG_gC) where: - tma_atom_c: The TMA copy atom - bSG_sC: The partitioned shared memory tensor C - bSG_gC: The partitioned global tensor C :rtype: Tuple[cute.CopyAtom, cute.Tensor, cute.Tensor] """ # (EPI_TILE_M, EPI_TILE_N, EPI_M, EPI_N, RestM, RestN, RestL) gC_epi = cute.flat_divide(gC_mnl[((None, None), 0, 0, None, None, None)], epi_tile) # ((ATOM_V, REST_V), EPI_M, EPI_N) # ((ATOM_V, REST_V), EPI_M, EPI_N, RestM, RestN, RestL) bSG_sC, bSG_gC = cpasync.tma_partition( atom, 0, cute.make_layout(1), cute.group_modes(sC, 0, 2), cute.group_modes(gC_epi, 0, 2), ) return bSG_sC, bSG_gC @staticmethod def _compute_stages( tiled_mma: cute.TiledMma, mma_tiler_mnk: Tuple[int, int, int], a_dtype: Type[cutlass.Numeric], b_dtype: Type[cutlass.Numeric], epi_tile: cute.Tile, c_dtype: Type[cutlass.Numeric], c_layout: utils.LayoutEnum, sf_dtype: Type[cutlass.Numeric], sf_vec_size: int, ab12_dtype: Type[cutlass.Numeric], ab12_layout: utils.LayoutEnum, epi_tile_ab12: cute.Tile, smem_capacity: int, occupancy: int, ab12_stages: int, ) -> Tuple[int, int, int]: """Computes the number of stages for A/B/C operands based on heuristics. :param tiled_mma: The tiled MMA object defining the core computation. :type tiled_mma: cute.TiledMma :param mma_tiler_mnk: The shape (M, N, K) of the MMA tiler. :type mma_tiler_mnk: tuple[int, int, int] :param a_dtype: Data type of operand A. :type a_dtype: type[cutlass.Numeric] :param b_dtype: Data type of operand B. :type b_dtype: type[cutlass.Numeric] :param epi_tile: The epilogue tile shape. :type epi_tile: cute.Tile :param c_dtype: Data type of operand C (output). :type c_dtype: type[cutlass.Numeric] :param c_layout: Layout enum of operand C. :type c_layout: utils.LayoutEnum :param sf_dtype: Data type of Scale factor. :type sf_dtype: type[cutlass.Numeric] :param sf_vec_size: Scale factor vector size. :type sf_vec_size: int :param ab12_dtype: Data type of operand AB12. :type ab12_dtype: type[cutlass.Numeric] :param ab12_layout: Layout enum of operand AB12. :type ab12_layout: utils.LayoutEnum :param epi_tile_ab12: The epilogue tile shape for AB12. :type epi_tile_ab12: cute.Tile :param smem_capacity: Total available shared memory capacity in bytes. :type smem_capacity: int :param occupancy: Target number of CTAs per SM (occupancy). :type occupancy: int :return: A tuple containing the computed number of stages for: (ACC stages, A/B operand stages, C stages) :rtype: tuple[int, int, int] """ # ACC stages num_acc_stage = 1 if mma_tiler_mnk[1] == 256 else 2 # Default C stages num_c_stage = mma_tiler_mnk[1] // cute.cosize(epi_tile[1]) // 2 # Use override value if provided, otherwise compute from tile sizes if ab12_stages is not None and ab12_stages > 0: num_ab12_stage = ab12_stages else: num_ab12_stage = mma_tiler_mnk[1] // cute.cosize(epi_tile_ab12[1]) # Calculate smem layout and size for one stage of A, B, SFA, SFB and C a_smem_layout_stage_one = sm100_utils.make_smem_layout_a( tiled_mma, mma_tiler_mnk, a_dtype, 1, # a tmp 1 stage is provided ) b_smem_layout_staged_one = sm100_utils.make_smem_layout_b( tiled_mma, mma_tiler_mnk, b_dtype, 1, # a tmp 1 stage is provided ) sfa_smem_layout_staged_one = blockscaled_utils.make_smem_layout_sfa( tiled_mma, mma_tiler_mnk, sf_vec_size, 1, # a tmp 1 stage is provided ) sfb_smem_layout_staged_one = blockscaled_utils.make_smem_layout_sfb( tiled_mma, mma_tiler_mnk, sf_vec_size, 1, # a tmp 1 stage is provided ) c_smem_layout_staged_one = sm100_utils.make_smem_layout_epi( c_dtype, c_layout, epi_tile, 1, ) ab12_smem_layout_staged_one = sm100_utils.make_smem_layout_epi( ab12_dtype, ab12_layout, epi_tile_ab12, 1, ) ab_bytes_per_stage = ( cute.size_in_bytes(a_dtype, a_smem_layout_stage_one) + cute.size_in_bytes(b_dtype, b_smem_layout_staged_one) + cute.size_in_bytes(sf_dtype, sfa_smem_layout_staged_one) + cute.size_in_bytes(sf_dtype, sfb_smem_layout_staged_one) ) mbar_helpers_bytes = 1024 c_bytes_per_stage = cute.size_in_bytes(c_dtype, c_smem_layout_staged_one) ab12_bytes_per_stage = cute.size_in_bytes(ab12_dtype, ab12_smem_layout_staged_one) amax_bytes = Sm100BlockScaledPersistentDenseGemmKernel.get_amax_smem_size() epi_bytes = c_bytes_per_stage * num_c_stage + ab12_bytes_per_stage * num_ab12_stage + amax_bytes # Calculate A/B/SFA/SFB stages: # Start with total smem per CTA (capacity / occupancy) # Subtract reserved bytes and initial C stages bytes # Divide remaining by bytes needed per A/B/SFA/SFB stage num_ab_stage = (smem_capacity // occupancy - (mbar_helpers_bytes + epi_bytes)) // ab_bytes_per_stage return num_acc_stage, num_ab_stage, num_c_stage, num_ab12_stage @staticmethod def _compute_grid( c: cute.Tensor, cta_tile_shape_mnk: Tuple[int, int, int], cluster_shape_mn: Tuple[int, int], max_active_clusters: cutlass.Constexpr, ) -> Tuple[utils.PersistentTileSchedulerParams, Tuple[int, int, int]]: """Use persistent tile scheduler to compute the grid size for the output tensor C. :param c: The output tensor C :type c: cute.Tensor :param cta_tile_shape_mnk: The shape (M, N, K) of the CTA tile. :type cta_tile_shape_mnk: tuple[int, int, int] :param cluster_shape_mn: Shape of each cluster in M, N dimensions. :type cluster_shape_mn: tuple[int, int] :param max_active_clusters: Maximum number of active clusters. :type max_active_clusters: cutlass.Constexpr :return: A tuple containing: - tile_sched_params: Parameters for the persistent tile scheduler. - grid: Grid shape for kernel launch. :rtype: Tuple[utils.PersistentTileSchedulerParams, tuple[int, int, int]] """ c_shape = cute.slice_(cta_tile_shape_mnk, (None, None, 0)) gc = cute.zipped_divide(c, tiler=c_shape) num_ctas_mnl = gc[(0, (None, None, None))].shape cluster_shape_mnl = (*cluster_shape_mn, 1) tile_sched_params = utils.PersistentTileSchedulerParams(num_ctas_mnl, cluster_shape_mnl) grid = utils.StaticPersistentTileScheduler.get_grid_shape(tile_sched_params, max_active_clusters) return tile_sched_params, grid @staticmethod def get_dtype_rcp_limits(dtype: Type[cutlass.Numeric]) -> float: """ Calculates the reciprocal of the maximum absolute value for a given data type. :param dtype: Data type :type dtype: Type[cutlass.Numeric] :return: An float representing the reciprocal of the maximum absolute value :rtype: float """ if dtype == cutlass.Float4E2M1FN: return 1 / 6.0 if dtype == cutlass.Float8E4M3FN: return 1 / 448.0 if dtype == cutlass.Float8E5M2: return 1 / 128.0 return 1.0 @staticmethod def get_amax_smem_size(): # Note: 4 is hardcoded for num_epilog_warps return 4 * cute.size_in_bytes(cutlass.Float32, cute.make_layout((1,))) class Sm100BlockScaledPersistentDenseGemmKernelNoDlpack: """Wrapper around Sm100BlockScaledPersistentDenseGemmKernel that avoids DLPack. This wrapper constructs cute.Tensors directly from cute.Pointer, shapes, and explicit layout orders for operands A, B, SFA, SFB, C, AB12, and optionally amax, sfc, and norm_const. """ def __init__( self, sf_vec_size: int, mma_tiler_mn: Tuple[int, int], cluster_shape_mn: Tuple[int, int], vector_f32: bool, ab12_stages: int, ): self.kernel = Sm100BlockScaledPersistentDenseGemmKernel( sf_vec_size=sf_vec_size, mma_tiler_mn=mma_tiler_mn, cluster_shape_mn=cluster_shape_mn, vector_f32=vector_f32, ab12_stages=ab12_stages, ) @cute.jit def __call__( self, a_ptr: cute.Pointer, a_shape: cutlass.Constexpr[Tuple[int, int, int]], a_order: cutlass.Constexpr[Tuple[int, int, int]], b_ptr: cute.Pointer, b_shape: cutlass.Constexpr[Tuple[int, int, int]], b_order: cutlass.Constexpr[Tuple[int, int, int]], sfa_ptr: cute.Pointer, sfa_shape: cutlass.Constexpr[Tuple[int, int, int, int, int, int]], sfa_order: cutlass.Constexpr[Tuple[int, int, int, int, int, int]], sfb_ptr: cute.Pointer, sfb_shape: cutlass.Constexpr[Tuple[int, int, int, int, int, int]], sfb_order: cutlass.Constexpr[Tuple[int, int, int, int, int, int]], c_ptr: cute.Pointer, c_shape: cutlass.Constexpr[Tuple[int, int, int]], c_order: cutlass.Constexpr[Tuple[int, int, int]], ab12_ptr: cute.Pointer, ab12_shape: cutlass.Constexpr[Tuple[int, int, int]], ab12_order: cutlass.Constexpr[Tuple[int, int, int]], amax_ptr: Optional[cute.Pointer], amax_shape: cutlass.Constexpr[Tuple[int]], amax_order: cutlass.Constexpr[Tuple[int]], sfc_ptr: Optional[cute.Pointer], sfc_shape: cutlass.Constexpr[Tuple[int, int, int, int, int, int]], sfc_order: cutlass.Constexpr[Tuple[int, int, int, int, int, int]], norm_const_ptr: Optional[cute.Pointer], norm_const_shape: cutlass.Constexpr[Tuple[int]], norm_const_order: cutlass.Constexpr[Tuple[int]], alpha: cutlass.Float32, max_active_clusters: cutlass.Constexpr, stream: cuda.CUstream, epilogue_op: cutlass.Constexpr = lambda x: x, ): a_cute = cute.make_tensor(a_ptr, layout=cute.make_ordered_layout(a_shape, order=a_order)) b_cute = cute.make_tensor(b_ptr, layout=cute.make_ordered_layout(b_shape, order=b_order)) sfa_cute = cute.make_tensor(sfa_ptr, layout=cute.make_ordered_layout(sfa_shape, order=sfa_order)) sfb_cute = cute.make_tensor(sfb_ptr, layout=cute.make_ordered_layout(sfb_shape, order=sfb_order)) c_cute = cute.make_tensor(c_ptr, layout=cute.make_ordered_layout(c_shape, order=c_order)) ab12_cute = cute.make_tensor(ab12_ptr, layout=cute.make_ordered_layout(ab12_shape, order=ab12_order)) amax_cute = None if cutlass.const_expr(amax_ptr is not None): amax_cute = cute.make_tensor(amax_ptr, layout=cute.make_ordered_layout(amax_shape, order=amax_order)) sfc_cute = None if cutlass.const_expr(sfc_ptr is not None): sfc_cute = cute.make_tensor(sfc_ptr, layout=cute.make_ordered_layout(sfc_shape, order=sfc_order)) norm_const_cute = None if cutlass.const_expr(norm_const_ptr is not None): norm_const_cute = cute.make_tensor( norm_const_ptr, layout=cute.make_ordered_layout(norm_const_shape, order=norm_const_order), ) self.kernel( a_cute, b_cute, sfa_cute, sfb_cute, c_cute, ab12_cute, amax_cute, sfc_cute, norm_const_cute, alpha, max_active_clusters, stream, epilogue_op, ) def fmin( a: Union[float, cutlass.Float32], b: Union[float, cutlass.Float32], *, loc=None, ip=None, nan=True, ) -> cutlass.Float32: ptx_instr = f"min.f32 $0, $1, $2;" return cutlass.Float32( cutlass._mlir.dialects.llvm.inline_asm( cutlass.cutlass_dsl.T.f32(), [ cutlass.Float32(a).ir_value(loc=loc, ip=ip), cutlass.Float32(b).ir_value(loc=loc, ip=ip), ], f"{ptx_instr}", f"=f,f,f", has_side_effects=True, is_align_stack=False, asm_dialect=cutlass._mlir.dialects.llvm.AsmDialect.AD_ATT, ) )